AT32UC3B0256 Atmel Corporation, AT32UC3B0256 Datasheet - Page 212

• Manufacturer Part Number: AT32UC3B0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.8.5
Name:
Access Type:
Offset:
Reset Value:
• SPIENS: SPI Enable Status
• TXEMPTY: Transmission Registers Empty
• NSSR: NSS Rising
• OVRES: Overrun Error Status
• MODF: Mode Fault Error
• TDRE: Transmit Data Register Empty
• RDRF: Receive Data Register Full
32059L–AVR32–01/2012
31
23
15
–
–
–
7
–
0: SPI is disabled.
1: SPI is enabled.
0: As soon as data is written in TDR.
1: TDR and internal shifter are empty. If a transfer delay has been defined, TXEMPTY is set after the completion of such delay.
0: No rising edge detected on NSS pin since last read.
1: A rising edge occurred on NSS pin since last read.
0: No overrun has been detected since the last read of SR.
1: An overrun has occurred since the last read of SR.
An overrun occurs when RDR is loaded at least twice from the serializer since the last read of the RDR.
0: No Mode Fault has been detected since the last read of SR.
1: A Mode Fault occurred since the last read of the SR.
0: Data has been written to TDR and not yet transferred to the serializer.
1: The last data written in the Transmit Data Register has been transferred to the serializer.
TDRE equals zero when the SPI is disabled or at reset. The SPI enable command sets this bit to one.
0: No data has been received since the last read of RDR
1: Data has been received and the received data has been transferred from the serializer to RDR since the last read of RDR.
Status Register
30
22
14
SR
Read-only
0x10
0x00000000
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
OVRES
27
19
11
–
–
–
3
MODF
26
18
10
–
–
2
-
TXEMPTY
TDRE
25
17
–
–
9
1
SPIENS
NSSR
RDRF
24
16
–
8
0
212