AT32UC3B0256 Atmel Corporation, AT32UC3B0256 Datasheet - Page 309

• Manufacturer Part Number: AT32UC3B0256
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0256

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

21.6.4.5
32059L–AVR32–01/2012
Radio Interface: Manchester Endec Application
Figure 21-13. Preamble Pattern Mismatch
The receiver samples the RX line in continuos bit period quarters, making the smallest time
frame in which to assume a bit value three quarters. A start bit is assumed if RXD is zero during
one of these quarters. See
Figure 21-14. Asynchronous Start Bit Detection
If a valid preamble pattern or start frame delimiter is detected, the receiver continues decoding
with the same synchronization. If the stream does not match a valid preamble pattern or a start
frame delimiter, the receiver re-synchronizes at the next valid edge. When a valid start sequence
has been detected, the decoded data is passed to the USART and the user will be notified of
any incoming Manchester encoding violations by the Manchester Error bit (CSR.MANE). This bit
is cleared by writing a one to the Reset Status bits in the Control Register (CR.RSTSTA). A vio-
lation occurs when there is no transition in the middle of a bit period. See
illustration of a violation causing the Manchester Error bit to be set.
Figure 21-15. Manchester Error
This section describes low data rate, full duplex, dual frequency, RF systems integrated with a
Manchester endec, that support ASK and/or FSK modulation schemes. See
Manchester
Manchester
encoded
Manchester
Sampling
encoded
encoded
data
(16 x)
Clock
data
data
sampling points
Txd
Txd
Txd
1
Figure
Manchester coding error
2
Preamble Length
Preamble Mismatch
3
21-14.
Preamble Length is set to 8
4
is set to 4
Detection
Start
and Start Frame Delimiter
Preamble subpacket
were successfully
Preamble Mismatch
SFD
invalid pattern
decoded
Entering USART character area
Elementary character bit time
SFD
Figure 21-15
Figure
Coding Error
Manchester
21-16.
DATA
detected
for an
309