AT89C51CC01 Atmel Corporation, AT89C51CC01 Datasheet - Page 24

• Manufacturer Part Number: AT89C51CC01
• Manufacturer: Atmel Corporation

Specifications of AT89C51CC01

• Flash (kbytes): 32 Kbytes
• Max. Operating Frequency: 40 MHz
• Cpu: 8051-12C
• Max I/o Pins: 34
• Uart: 1
• Can: 1
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 62.5
• Sram (kbytes): 1.25
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 3.0 to 5.5
• Timers: 4
• Isp: UART/CAN
• Watchdog: Yes

Internal Space
Lower 128 Bytes RAM
Upper 128 Bytes RAM
Expanded RAM
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A/T89C51CC01
The lower 128 Bytes of RAM (see Figure 11) are accessible from address 00h to 7Fh
using direct or indirect addressing modes. The lowest 32 Bytes are grouped into 4
banks of 8 registers (R0 to R7). Two bits RS0 and RS1 in PSW register (see Figure 18)
select which bank is in use according to Table 16. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct address-
ing, and can be used for context switching in interrupt service routines.
Table 16. Register Bank Selection
The next 16 Bytes above the register banks form a block of bit-addressable memory
space. The C51 instruction set includes a wide selection of single-bit instructions, and
the 128 bits in this area can be directly addressed by these instructions. The bit
addresses in this area are 00h to 7Fh.
Figure 12. Lower 128 Bytes Internal RAM Organization
The upper 128 Bytes of RAM are accessible from address 80h to FFh using only indirect
addressing mode.
The on-chip 1024 Bytes of expanded RAM (XRAM) are accessible from address 0000h
to 03FFh using indirect addressing mode through MOVX instructions. In this address
range, the bit EXTRAM in AUXR register is used to select the XRAM (default) or the
XRAM. As shown in Figure 11 when EXTRAM = 0, the XRAM is selected and when
EXTRAM = 1, the XRAM is selected.
The size of XRAM can be configured by XRS1-0 bit in AUXR register (default size is
1024 Bytes).
Note:
RS1
Lower 128 Bytes RAM, Upper 128 Bytes RAM, and expanded RAM are made of volatile
memory cells. This means that the RAM content is indeterminate after power-up and
must then be initialized properly.
0
0
1
1
RS0
0
1
0
1
30h
20h
18h
10h
08h
00h
Description
Register bank 0 from 00h to 07h
Register bank 0 from 08h to 0Fh
Register bank 0 from 10h to 17h
Register bank 0 from 18h to 1Fh
7Fh
2Fh
1Fh
0Fh
17h
07h
Bit-Addressable Space
(Bit Addresses 0-7Fh)
4 Banks of
8 Registers
R0-R7
4129N–CAN–03/08