AT89C51CC01 Atmel Corporation, AT89C51CC01 Datasheet - Page 36

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AT89C51CC01

Manufacturer Part Number
AT89C51CC01
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51CC01

Flash (kbytes)
32 Kbytes
Max. Operating Frequency
40 MHz
Cpu
8051-12C
Max I/o Pins
34
Uart
1
Can
1
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
62.5
Sram (kbytes)
1.25
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
3.0 to 5.5
Timers
4
Isp
UART/CAN
Watchdog
Yes

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FM0 Memory Architecture
User Space
Extra Row (XRow)
Hardware Security Byte
Column Latches
Cross Flash Memory Access
Description
36
A/T89C51CC01
The Flash memory is made up of 4 blocks (see Figure 20):
This space is composed of a 32K Bytes Flash memory organized in 256 pages of 128
Bytes. It contains the user’s application code.
This row is a part of FM0 and has a size of 128 Bytes. The extra row may contain infor-
mation for boot loader usage.
The Hardware security Byte space is a part of FM0 and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
The column latches, also part of FM0, have a size of full page (128 Bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
The FM0 memory can be program only from FM1. Programming FM0 from FM0 or from
external memory is impossible.
The FM1 memory can be program only by parallel programming.
The Table 24 show all software Flash access allowed.
Table 24. Cross Flash Memory Access
The memory array (user space) 32K Bytes
The Extra Row
The Hardware security bits
The column latch registers
(boot Flash)
(user Flash)
External
memory
EA = 0
FM0
FM1
Load column latch
Load column latch
Load column latch
Action
Read
Write
Read
Write
Read
Write
(user Flash)
FM0
ok
ok
ok
ok
ok
-
-
-
-
(boot Flash)
4129N–CAN–03/08
FM1
ok
-
-
-
-
-
-
-
-

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