AT89LP216 Atmel Corporation, AT89LP216 Datasheet - Page 23

• Manufacturer Part Number: AT89LP216
• Manufacturer: Atmel Corporation

Specifications of AT89LP216

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 14
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.125
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI/OCD
• Watchdog: Yes

13.1.1
3621E–MICRO–11/10
Quasi-bidirectional Output
Table 13-2.
Port pins in quasi-bidirectional output mode function similar to standard 8051 port pins. A Quasi-
bidirectional port can be used both as an input and output without the need to reconfigure the
port. This is possible because when the port outputs a logic high, it is weakly driven, allowing an
external device to pull the pin low. When the pin is driven low, it is driven strongly and able to
sink a large current. There are three pull-up transistors in the quasi-bidirectional output that
serve different purposes. One of these pull-ups, called the “very weak” pull-up, is turned on
whenever the port latch for the pin contains a logic “1”. This very weak pull-up sources a very
small current that will pull the pin high if it is left floating.
A second pull-up, called the “weak” pull-up, is turned on when the port latch for the pin contains
a logic “1” and the pin itself is also at a logic “1” level. This pull-up provides the primary source
current for a quasi-bidirectional pin that is outputting a “1”. If this pin is pulled low by an external
device, this weak pull-up turns off, and only the very weak pull-up remains on. In order to pull the
pin low under these conditions, the external device has to sink enough current to overpower the
weak pull-up and pull the port pin below its input threshold voltage.
The third pull-up is referred to as the “strong” pull-up. This pull-up is used to speed up low-to-
high transitions on a quasi-bidirectional port pin when the port latch changes from a logic “0” to a
logic “1”. When this occurs, the strong pull-up turns on for two CPU clocks quickly pulling the
port pin high. The quasi-bidirectional port configuration is shown in
cuitry of P1.3, P3.2 and P3.3 is not disabled during Power-down (see
Figure 13-1. Quasi-bidirectional Output
PxM0.y
From Port
Register
0
0
1
1
Configuration Modes for Port x, Bit y
PxM1.y
0
1
0
1
1 Clock Delay
(D Flip-Flop)
Port Mode
Quasi-bidirectional
Push-pull Output
Input Only (High Impedance)
Open-drain Output
Input
Data
PWD
V
Strong
CC
V
Weak
Very
CC
Figure
Figure
AT89LP216
13-1. The input cir-
13-3).
V
Weak
CC
Port
Pin
23