AT89LP216 Atmel Corporation, AT89LP216 Datasheet - Page 24

• Manufacturer Part Number: AT89LP216
• Manufacturer: Atmel Corporation

Specifications of AT89LP216

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 14
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.125
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI/OCD
• Watchdog: Yes

13.1.2
13.1.3
13.1.4
24
AT89LP216
Input-only Mode
Open-drain Output
Push-pull Output
The input only port configuration is shown in
input includes a Schmitt-triggered input for improved input noise rejection. The input circuitry of
P1.3, P3.2 and P3.3 is not disabled during Power-down (see
safely driven to 5.5V even when operating at lower V
the Schmitt trigger will be set by the V
Figure 13-2. Input Only
Figure 13-3. Input Only for P1.3, P3.2 and P3.3
The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor
of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con-
figured in this manner must have an external pull-up, typically a resistor tied to V
down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-
ration is shown in
Power-down (see
operating at lower V
the V
Figure 13-4. Open-drain Output
The push-pull output configuration has the same pull-down structure as both the open-drain and
the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port
latch contains a logic “1”. The push-pull mode may be used when more source current is needed
from a port output. Note that due to the 5V tolerant architecture, the push-pull output will have
reduced output high levels at DC operation and hot temperature. Under AC operation an inte-
grated boost circuit provides more source current. The push-pull port configuration is shown in
Figure
Figure
CC
13-5. The input circuitry of P1.3, P3.2 and P3.3 is not disabled during Power-down (see
13-3).
Register
From Port
level and must be taken into consideration.
Input
Data
Figure
Figure
Input
Data
CC
PWD
levels; however, the input threshold of the Schmitt trigger will be set by
13-4.The input circuitry of P1.3, P3.2 and P3.3 is not disabled during
13-3). Open-drain pins can be safely pulled high to 5.5V even when
CC
level and must be taken into consideration.
Figure
Input
Data
PWD
13-2. The output drivers are tristated. The
CC
levels; however, the input threshold of
Port
Pin
Port
Pin
Figure
13-3). Input pins can be
3621E–MICRO–11/10
CC
Port
Pin
. The pull-