AT89LP216 Atmel Corporation, AT89LP216 Datasheet - Page 65

• Manufacturer Part Number: AT89LP216
• Manufacturer: Atmel Corporation

Specifications of AT89LP216

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 14
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.125
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI/OCD
• Watchdog: Yes

24.1
3621E–MICRO–11/10
Physical Interface
For more detailed information on In-System Programming, refer to the Application Note entitled
“AT89LP In-System Programming Specification”.
In-System Programming utilizes the Serial Peripheral Interface (SPI) pins of an AT89LP216
microcontroller. The SPI is a full duplex synchronous serial interface consisting of four wires:
Serial Clock (SCK), Master-In/Slave-out (MISO), Master-out/Slave-in (MOSI), and an active-low
Slave Select (SS). When programming an AT89LP216 device, the programmer always operates
as the SPI master, and the target system always operates as the SPI slave. To enter or remain
in In-System Programming mode the device’s reset line (RST) must be held active (low). With
the addition of VCC and GND, an AT89LP216 microcontroller can be programmed with a mini-
mum of seven connections as shown in
Figure 24-1. In-System Programming Device Connections
The In-System Programming Interface is the only means of externally programming the
AT89LP216 microcontroller. The ISP Interface can be used to program the device both in-sys-
tem and in a stand-alone serial programmer. The ISP Interface does not require any clock other
than SCK and is not limited by the system clock frequency. During In-System programming the
system clock source of the target device can operate normally.
When designing a system where In-System Programming will be used, the following observa-
tions must be considered for correct operation:
• Flexible Page Programming
• Row Erase Capability
• Page Write with Auto-Erase Commands
• Programming Status Register
• The ISP interface uses the SPI clock mode 0 (CPOL = 0,CPHA = 0) exclusively with a
• The AT89LP216 will enter programming mode only when its reset line (RST) is active (low).
maximum frequency of 5 MHz.
To simplify this operation, it is recommended that the target reset can be controlled by the In-
System programmer. To avoid problems, the In-System programmer should be able to keep
the entire target system reset for the duration of the programming cycle. The target system
should never attempt to drive the four SPI lines while reset is active.
Serial Clock
Serial Out
Serial In
SS
Figure
P1.7/SCK
P1.6/MISO
P1.5/MOSI
P1.4/SS
GND
AT89LP216
24-1.
P1.3/RST
VCC
AT89LP216
RST
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