ATmega162 Atmel Corporation, ATmega162 Datasheet - Page 107

• Manufacturer Part Number: ATmega162
• Manufacturer: Atmel Corporation

Specifications of ATmega162

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 6
• Input Capture Channels: 2
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Registers
2513K–AVR–07/09
Figure 46. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B), and Input Capture Regis-
ter (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFR) and Extended Timer Interrupt Flag Register
(ETIFR). All interrupts are individually masked with the Timer Interrupt Mask Register (TIMSK)
and Extended Timer Interrupt Mask Register (ETIMSK). (E)TIFR and (E)TIMSK are not shown in
the figure since these registers are shared by other Timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the Timer Clock (clk
The double buffered Output Compare Registers (OCRnA/B) are compared with the Timer/Coun-
ter value at all time. The result of the compare can be used by the waveform generator to
generate a PWM or variable frequency output on the Output Compare pin (OCnA/B).
put Compare Units” on page 114.
Flag (OCFnA/B) which can be used to generate an output compare interrupt request.
109. The Timer/Counter Control Registers (TCCRnA/B) are 8-bit registers and have no
1. Refer to
Timer/Counter1 pin placement and description.
Timer/Counter
TCCRnA
Figure 1 on page
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
The Compare Match event will also set the Compare Match
2,
Control Logic
TOP
Table 32 on page
=
TCCRnB
Values
BOTTOM
Fixed
TOP
(1)
ICFn (Int.Req.)
clk
Detector
Edge
=
Tn
0
72, and
“Accessing 16-bit Registers” on
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
Waveform
Waveform
( From Prescaler )
Canceler
Detector
Noise
Edge
ATmega162/V
Table 38 on page 78
Comparator Ouput )
( From Analog
OCnA
OCnB
See “Out-
ICPn
Tn
T
n
).
107
for