ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 16

• Manufacturer Part Number: ATmega16A
• Manufacturer: Atmel Corporation

Specifications of ATmega16A

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7. AVR Memories
7.1
7.2
16
Overview
In-System Reprogrammable Flash Program Memory
ATmega16A
This section describes the different memories in the ATmega16A. The AVR architecture has two
main memory spaces, the Data Memory and the Program Memory space. In addition, the
ATmega16A features an EEPROM Memory for data storage. All three memory spaces are linear
and regular.
The ATmega16A contains 16K bytes On-chip In-System Reprogrammable Flash memory for
program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as 8K
x 16. For software security, the Flash Program memory space is divided into two sections, Boot
Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega16A
Program Counter (PC) is 13 bits wide, thus addressing the 8K program memory locations. The
operation of Boot Program section and associated Boot Lock bits for software protection are
described in detail in
250.
downloading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory Instruction Description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 7-1.
“Memory Programming” on page 264
13.
Program Memory Map
“Boot Loader Support – Read-While-Write Self-Programming” on page
Application Flash Section
Boot Flash Section
contains a detailed description on Flash data serial
$0000
$1FFF
“Instruction Execution Tim-
8154B–AVR–07/09