ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 298

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ATmega16A

Manufacturer Part Number
ATmega16A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega16A

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Table 27-4.
Notes:
27.8
298
Symbol
t
t
t
t
HD;DAT
SU;DAT
SU;STO
BUF
1. In ATmega16A, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all ATmega16A Two-wire Serial Interface operation. Other devices connected to the Two-wire
6. The actual low period generated by the ATmega16A Two-wire Serial Interface is (1/f
7. The actual low period generated by the ATmega16A Two-wire Serial Interface is (1/f
SPI Timing Characteristics
ATmega16A
Serial Bus need only obey the general f
6 MHz for the low time requirement to be strictly met at f
ment will not be strictly met for f
communicate at full speed (400 kHz) with other ATmega16A devices, as well as any other device with a proper t
tance margin.
Parameter
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
Two-wire Serial Bus Requirements (Continued)
Figure 27-4. Two-wire Serial Bus Timing
Figure 27-5. SPI Serial Programming Waveforms
SCL
> 100 kHz.
SCL
SDA
SERIAL DATA OUTPUT
SERIAL CLOCK INPUT
SERIAL DATA INPUT
t
SU;STA
SCL
SAMPLE
> 308 kHz when f
(MOSI)
(MISO)
(SCK)
SCL
requirement.
t
HD;STA
t
of
t
LOW
MSB
MSB
CK
f
f
f
f
f
f
f
f
= 8 MHz. Still, ATmega16A devices connected to the bus may
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
= 100 kHz.
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
HIGH
t
HD;DAT
t
LOW
t
SU;DAT
SCL
SCL
- 2/f
Min
250
100
4.0
0.6
4.7
1.3
- 2/f
0
0
CK
CK
), thus f
), thus the low time require-
CK
t
SU;STO
must be greater than
t
Max
3.45
r
0.9
LSB
LSB
8154B–AVR–07/09
LOW
t
BUF
accep-
Units
µs
µs
ns
ns
µs
µs
µs
µs

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