ATmega16A Atmel Corporation, ATmega16A Datasheet - Page 25

• Manufacturer Part Number: ATmega16A
• Manufacturer: Atmel Corporation

Specifications of ATmega16A

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.1.3
8.1.4
8.1.5
8.2
8.3
8154B–AVR–07/09
Clock Sources
Default Clock Source
Flash Clock – clk
Asynchronous Timer Clock – clk
ADC Clock – clk
The Flash clock controls operation of the Flash interface. The Flash clock is usually active simul-
taneously with the CPU clock.
The Asynchronous Timer clock allows the Asynchronous Timer/Counter to be clocked directly
from an external 32 kHz clock crystal. The dedicated clock domain allows using this
Timer/Counter as a real-time counter even when the device is in sleep mode.
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion
results.
The device has the following clock source options, selectable by Flash Fuse bits as shown
below. The clock from the selected source is input to the AVR clock generator, and routed to the
appropriate modules.
Table 8-1.
Note:
The various choices for each clocking option is given in the following sections. When the CPU
wakes up from Power-down or Power-save, the selected clock source is used to time the start-
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts
from Reset, there is as an additional delay allowing the power to reach a stable level before
commencing normal operation. The Watchdog Oscillator is used for timing this real-time part of
the start-up time. The number of WDT Oscillator cycles used for each time-out is shown in
8-2. The frequency of the Watchdog Oscillator is voltage dependent as shown in
acteristics” on page
Table 8-2.
The device is shipped with CKSEL = “0001” and SUT = “10”. The default clock source setting is
therefore the 1 MHz Internal RC Oscillator with longest startup time. This default setting ensures
that all users can make their desired clock source setting using an In-System or Parallel
Programmer.
ADC
Device Clocking Option
External Crystal/Ceramic Resonator
External Low-frequency Crystal
External RC Oscillator
Calibrated Internal RC Oscillator
External Clock
FLASH
Typ Time-out (V
1. For all fuses “1” means unprogrammed while “0” means programmed.
4.1 ms
65 ms
Device Clocking Options Select
Number of Watchdog Oscillator Cycles
ASY
CC
305.
= 5.0V)
Typ Time-out (V
(1)
4.3 ms
69 ms
CC
= 3.0V)
ATmega16A
Number of Cycles
64K (65,536)
4K (4,096)
1111 - 1010
1000 - 0101
0100 - 0001
CKSEL3:0
1001
0000
“Typical Char-
Table
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