ATtiny87 Atmel Corporation, ATtiny87 Datasheet - Page 282
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ATtiny87
Manufacturer Part Number
ATtiny87
Description
Manufacturer
Atmel Corporation
Specifications of ATtiny87
Flash (kbytes)
8 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Quantity
Price
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28. Errata
28.1
28.1.1
28.1.2
28.2
28.2.1
28.2.2
28.3
282
Errata ATtiny87
Errata ATtiny167
Errata Description
ATtiny87/ATtiny167
Rev. C
Rev. A - B
Rev. C
Rev. A - B
The revision letter in this section refers to the revision of the ATtiny87 device.
Not sampled.
The revision letter in this section refers to the revision of the ATtiny167 device.
Not sampled.
1. Gain control of the crystal oscillator.
• Gain control of the crystal oscillator.
• ‘Disable Clock Source’ command remains enabled.
• Gain control of the crystal oscillator.
• ‘Disable Clock Source’ command remains enabled.
The crystal oscillator (0.4 -> 16 MHz) doesn’t latch its gain control (CKSEL/CSEL[2:0]
bits):
a. The ‘Recover System Clock Source’ command doesn’t returns CSEL[2:0] bits.
b. The gain control can be modified on the fly if CLKSELR changes.
Problem fix / workaround .
a. No workaround.
b. As soon as possible, after any CLKSELR modification, re-write the appropriate crystal
Code example:
; Select crystal oscillator ( 16MHz crystal, fast rising power)
; Enable clock source (crystal oscillator)
;
oscillator setting (CSEL[3]=1 and CSEL[2:0] / CSUT[1:0] bits) in CLKSELR.
Clock source switch
ldi
sts
ldi
ldi
sts
sts
ldi
sts
temp1,((0x0F<<CSEL0)|(0x02<<CSUT0))
CLKSELR, temp1
temp2,(1<<CLKCCE)
temp3,(0x02<<CLKC0)
CLKCSR,temp2
CLKCSR,temp3
temp3,(0x04<<CLKC0)
CLKCSR,temp2
; CSEL = "0010"
; Enable CLKCSR register access
; Enable crystal oscillator clock
; CSEL = "0100"
; Enable CLKCSR register access
8265B–AVR–09/10
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