ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 162

• Manufacturer Part Number: ATxmega128A1
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A1

• Flash (kbytes): 128 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 78
• Ext Interrupts: 78
• Usb Speed: No
• Usb Interface: No
• Spi: 12
• Twi (i2c): 4
• Uart: 8
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 8
• Output Compare Channels: 24
• Input Capture Channels: 24
• Pwm Channels: 24
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.8.5
8077H–AVR–12/09
Port override for Waveform Generation
Figure 14-14. Dual-slope Pulse Width Modulation
Using dual-slope PWM result in a lower maximum operation frequency compared to the single-
slope PWM operation.
The period register (PER) defines the PWM resolution. The minimum resolution is 2-bit
(PER=0x0003), and maximum resolution is 16-bit (PER=MAX).
The following equation can be used for calculate the exact resolution for dual-slope PWM
(R
The PWM frequency depends on the period setting (PER) and the Peripheral Clock frequency
(f
N represents the prescaler divider used (1, 2, 4, 8, 64, 256, 1024, or event channel n).
To make the waveform generation available on the port pins the corresponding port pin direction
must be set as output. The Timer/Counter will override the port pin values when the CC channel
is enabled (CCENx) and a waveform generation mode is selected.
Figure 14-15 on page 163
1, CC channel A to D will override port pin 0 to 3 output value (OUTxn) on the corresponding
port pin (Pxn). For Timer/Counter 1, CC channel A and B will override port pin 4 and 5. Enabling
inverted I/O on the port pin (INVENxn) inverts the corresponding WG output.
R
f
PWM_DS
PER
PWM_DS
PWM_DS
CNT
WG Output
), and can be calculated by the following equation:
=
):
=
------------------- -
2NPER
log
---------------------------------- -
f
PER
MAX
TOP
BOT
(
log
PER
2 ( )
+
1
)
shows the port override for Timer/Counter 0 and 1. For Timer/Counter
CCx
Period (T)
CCx=BOT
CCx=TOP
XMEGA A
"update"
"match"
162