ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 65
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ATxmega128A1
Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128A1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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6. Event System
6.1
6.2
8077H–AVR–12/09
Features
Overview
•
•
•
•
•
•
•
•
The Event System is a set of features for inter peripheral communication. It enables the possibil-
ity for a change of state in one peripheral to automatically trigger actions in other peripherals.
The change of state in a peripheral that will trigger actions in other peripherals is configurable in
software. It is a simple, but powerful system as it allows for autonomous control of peripherals
without any use of interrupt, CPU or DMA resources.
The indication of a change of state in a peripheral is referred to as an event. The events are
passed between peripherals using a dedicated routing network called the Event Routing Net-
work.
Routing Network and the peripherals that are connected.
Inter peripheral communication and signalling
CPU and DMA independent operation
8 Event Channels allows for up to 8 signals to be routed at the same time
100% predictable timing between peripherals
Events can be generated by
Events can be used by
Advanced Features
Operative in Active and Idle mode
– Timer/Counters (TCxn)
– Real Time Counter (RTC)
– Analog to Digital Converters (ADCx)
– Analog Comparators (ACx)
– Ports (PORTx)
– System Clock (Clk
– Timer/Counters (TCxn)
– Analog to Digital Converters (ADCx)
– Digital to Analog Converters (DACx)
– DMA (DMA) Controller
– Ports
– Manual Event Generation from software (CPU)
– Quadrature Decoding
– Digital Filtering
Figure 6-1 on page 66
SYS
)
shows a basic block diagram of the Event System with the Event
XMEGA A
65
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