ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 5
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ATxmega128A1
Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega128A1
Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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3.
3.1
3.2
3.3
8077H–AVR–12/09
AVR CPU
Features
Overview
Architectural Overview
•
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•
•
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•
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XMEGA uses the 8/16-bit AVR CPU. The main function of the CPU is to ensure correct program
execution. The CPU is able to access memories, perform calculations and control peripherals.
Interrupt handling is described in a separate section, refer to
Multi-level Interrupt Controller” on page 123
In order to maximize performance and parallelism, the AVR uses a Harvard architecture with
separate memories and buses for program and data. Instructions in the program memory are
executed with a single level pipelining. While one instruction is being executed, the next instruc-
tion is pre-fetched from the Program Memory. This concept enables instructions to be executed
in every clock cycle. For the summary of all AVR instructions refer to
on page
8/16-bit high performance AVR RISC CPU
32x8-bit registers directly connected to the ALU
Stack in RAM
Stack Pointer accessible in I/O memory space
Direct addressing of up to 16M bytes of program memory and 16M bytes of data memory
True 16/24-bit access to 16/24-bit I/O registers
Efficient support for both 8-, 16- and 32-bit Arithmetic
Configuration Change Protection of system critical features
– 138 instructions
– Hardware multiplier
388. For details of all AVR instructions refer to http://www.atmel.com/avr.
for more details on this.
”Interrupts and Programmable
”Instruction Set Summary”
XMEGA A
5
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