ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 147

• Manufacturer Part Number: ATxmega64A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

13.16.4
8077H–AVR–12/09
INTFLAGS - Interrupt Flag Register
• Bit 7:0 - IN[7:0]: Data Input Value
This register shows the value present on the pins if the digital input buffer is enabled. The config-
uration of "VPCTRLA - Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map
Control Register B" decides the value in the register. When a port is mapped as virtual, access-
ing this register is identical to accessing the actual IN register for the port.
• Bit 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1:0 - INTnIF: Interrupt n Flag
The INTnIF flag is set when a pin change according to the pin's input sense configuration
occurs, and the pin is set as source for port interrupt n. Writing a one to this flag's bit location will
clear the flag. For enabling and executing the interrupt refer to the Interrupt Level description.
The configuration of "VPCTRLA - Virtual Port-map Control Register A" or "VPCTRLB - Virtual
Port-map Control Register B" decides which the flags mapped. When a port is mapped as vir-
tual, accessing this register is identical to accessing the actual INTFLAGS register for the port.
Bit
+0x03
Read/Write
Initial Value
R
7
0
-
R
6
0
-
5
R
0
-
R
4
0
-
R
3
0
-
R
2
0
-
INT1IF
R/W
1
0
XMEGA A
INT0IF
R/W
0
0
INTFLAGS
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