ATxmega64A3 Atmel Corporation, ATxmega64A3 Datasheet - Page 184

• Manufacturer Part Number: ATxmega64A3
• Manufacturer: Atmel Corporation

Specifications of ATxmega64A3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

15.7.4
15.7.5
8077H–AVR–12/09
STATUS - Status Register
DTBOTH - Dead-time Concurrent Write to Both Sides
Table 15-1.
• Bit 7:3 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 2 - FDF: Fault Detect Flag
This flag is set when a fault detect condition is detected, i.e. when an event is detected on one of
the event channels enabled by the FDEVMASK. This flag is cleared by writing a one to its bit
location.
• Bit 1 - DTHSBUFV: Dead-Time High Side Buffer Valid
If this bit is set the corresponding DT buffer is written and contains valid data that will be copied
into the DTLS Register on the UPDATE condition. If this bit is zero no action will be taken. The
connected Timer/Counter’s lock update (LUPD) flag also affects the update for dead time
buffers.
• Bit 0 - DTLSBUFV: Dead-Time Low Side Buffer Valid
If this bit is set the corresponding DT buffer is written and contains valid data that will be copied
into the DTHS Register on the UPDATE condition. If this bit is zero no action will be taken. Note
that the connected Timer/Counter unit's lock update (LUPD) flag also affects the update for dead
time buffers.
Bit
+0x04
Read/Write
Initial Value
Bit
+0x06
Read/Write
Initial Value
FDACT[1:0]
00
01
11
R/W
Fault actions
R
7
0
-
7
0
Group Configuration
R
6
0
-
R/W
6
0
CLEARDIR
CLEAROE
NONE
R
5
0
-
R/W
5
0
R
4
0
-
R/W
4
0
Description
None (Fault protection disabled)
Clear all override enable (OUTOVEN) bits, i.e. disable
the output override.
Clear all Direction (DIR) bits, which correspond to
enabled DTI channel(s), i.e. tri-state the outputs
DTBOTH[7:0]
R
3
0
-
R/W
3
0
FDF
R/W
2
0
R/W
2
0
DTHSBUFV
R/W
1
0
R/W
1
0
DTLSBUFV
XMEGA A
R/W
0
0
R/W
0
0
STATUS
DTBOTH
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