SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 134

• Manufacturer Part Number: SAM3S16C
• Manufacturer: Atmel Corporation

Specifications of SAM3S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 100 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 39
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

12.16.1
12.16.1.1
12.16.1.2
12.16.1.3
92
SAM3S16
B, BL, BX, and BLX
Syntax
Operation
Restrictions
Branch instructions.
where:
B
BL
BX
BLX
cond
label
Rm
be 1, but the address to branch to is created by changing bit[0] to 0.
All these instructions cause a branch to label, or to the address indicated in Rm. In addition:
Bcond label is the only conditional instruction that can be either inside or outside an IT block. All
other branch instructions must be conditional inside an IT block, and must be unconditional out-
side the IT block, see
Table 12-24
Table 12-24. Branch ranges
You might have to use the .W suffix to get the maximum branch range. See
selection” on page
The restrictions are:
Instruction
B label
Bcond label
Bcond label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
• The BL and BLX instructions write the address of the next instruction to LR (the link register,
• The BX and BLX instructions cause a UsageFault exception if bit[0] of Rm is 0.
R14).
B{cond} label
BL{cond} label
BX{cond} Rm
BLX{cond} Rm
(outside IT block)
(inside IT block)
shows the ranges for the various branch instructions.
is branch (immediate).
is branch with link (immediate).
is branch indirect (register).
is branch indirect with link (register).
is an optional condition code, see
is a PC-relative expression. See
is a register that indicates an address to branch to. Bit[0] of the value in Rm must
48.
“IT” on page
Any value in register
Any value in register
Branch range
−16 MB to +16 MB
−1 MB to +1 MB
−16 MB to +16 MB
−16 MB to +16 MB
95.
“PC-relative expressions” on page
“Conditional execution” on page
11117B–ATARM–18-Oct-11
“Instruction width
46.
46.