SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 762

• Manufacturer Part Number: SAM3S16C
• Manufacturer: Atmel Corporation

Specifications of SAM3S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 100 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 39
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

36.3
Figure 36-1.
Figure 36-2. Timer Counter Block Diagram
720
720
Block Diagram
SAM3S16
SAM3S16
TIMER_CLOCK1
TIMER_CLOCK2
TIMER_CLOCK3
TIMER_CLOCK4
TIMER_CLOCK5
Note:
• Each channel is user-configurable and contains:
• Two global registers that act on all three TC Channels
• Quadrature decoder
• 2-bit Gray Up/Down Counter for Stepper Motor
Timer Counter
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
TCLK0
TCLK1
TCLK2
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– Advanced line filtering
– Position / revolution / speed
The quadrature decoder logic connections are detailed in
the Quadrature Decoder with Timer Counters”
TIOA1
TIOA2
TIOA0
TIOA2
TIOA0
TIOA1
TC0XC0S
TC1XC1S
TC2XC2S
XC0
XC1
XC2
XC0
XC1
XC2
XC0
XC1
XC2
PWM
FAULT
Timer/Counter
Timer/Counter
Timer/Counter
Channel 0
Channel 1
Channel 2
SYNC
SYNC
SYNC
TIOA
TIOA
TIOA
TIOB
TIOB
TIOB
INT2
INT0
INT1
TIOA0
TIOB0
TIOA1
TIOB1
TIOA2
TIOB2
Controller
Interrupt
Figure 36-16 ”Predefined Connection of
Parallel I/O
Controller
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11
TCLK0
TCLK1
TCLK2
TIOA0
TIOA1
TIOB0
TIOB1
TIOA2
TIOB2