SAM3S16C Atmel Corporation, SAM3S16C Datasheet - Page 280

• Manufacturer Part Number: SAM3S16C
• Manufacturer: Atmel Corporation

Specifications of SAM3S16C

• Flash (kbytes): 1024 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 100 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 39
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 79
• Ext Interrupts: 79
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 1000
• Analog Comparators: 1
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

18.4.6.1
18.4.6.2
18.4.7
238
238
SAM3S16
SAM3S16
Wake Up Sources
Supply Monitor Reset
Brownout Detector Reset
asserted before shutting down the core power supply and released as soon as the core power
supply is correctly regulated.
There are two additional sources which can be programmed to activate vddcore_nreset:
The supply monitor is capable of generating a reset of the system. This can be enabled by set-
ting the SMRSTEN bit in the Supply Controller Supply Monitor Mode Register (SUPC_SMMR).
If SMRSTEN is set and if a supply monitor detection occurs, the vddcore_nreset signal is imme-
diately activated for a minimum of 1 slow clock cycle.
The brownout detector provides the bodcore_in signal to the SUPC which indicates that the volt-
age regulation is operating as programmed. If this signal is lost for longer than 1 slow clock
period while the voltage regulator is enabled, the Supply Controller can assert vddcore_nreset.
This feature is enabled by writing the bit, BODRSTEN (Brownout Detector Reset Enable) to 1 in
the Supply Controller Mode Register (SUPC_MR).
If BODRSTEN is set and the voltage regulation is lost (output voltage of the regulator too low),
the vddcore_nreset signal is asserted for a minimum of 1 slow clock cycle and then released if
bodcore_in has been reactivated. The BODRSTS bit is set in the Supply Controller Status Reg-
ister (SUPC_SR) so that the user can know the source of the last reset.
Until bodcore_in is deactivated, the vddcore_nreset signal remains active.
The wake up events allow the device to exit backup mode. When a wake up event is detected,
the Supply Controller performs a sequence which automatically reenables the core power
supply.
• a supply monitor detection
• a brownout detection
11117B–ATARM–18-Oct-11
11117B–ATARM–18-Oct-11