SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 476

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

30.7.11
Name:
Address:
Access:
Reset:
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x444452 (“DDR” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x444452 (“DDR” in ASCII).
Protects the registers:
• WPKEY: Write Protect KEY
Should be written at value 0x444452 (“DDR” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
476
476
•
•
•
•
•
•
•
•
“DDRSDRC Mode Register” on page 462
“DDRSDRC Refresh Timer Register” on page 463
“DDRSDRC Configuration Register” on page 464
“DDRSDRC Timing Parameter 0 Register” on page 467
“DDRSDRC Timing Parameter 1 Register” on page 469
“DDRSDRC Timing Parameter 2 Register” on page 470
“DDRSDRC Memory Device Register” on page 473
“DDRSDRC High Speed Register” on page 475
31
23
15
—
7
SAM9G25
SAM9G25
DDRSDRC Write Protect Mode Register
DDRSDRC_WPMR
0xFFFFE8E4
Read-write
See
Table 30-16
30
22
14
—
6
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
27
19
11
—
3
26
18
10
—
2
25
17
—
9
1
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11
WPEN
24
16
8
0