SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 523

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.7.11
Name:
Address:
Access:
Reset:
• DISx: [7:0]
Write one to this field to disable the relevant DMAC Channel. The content of the FIFO is lost and the current AHB access is
terminated. Software must poll DIS[7:0] field in the DMAC_CHSR register to be sure that the channel is disabled.
• RESx: [7:0]
Write one to this field to resume the channel transfer restoring its context.
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11
RES7
DIS7
31
23
15
–
–
7
DMAC Channel Handler Disable Register
DMAC_CHDR
0xFFFFEC2C (0), 0xFFFFEE2C (1)
Write-only
0x00000000
RES6
DIS6
30
22
14
–
–
6
RES5
DIS5
29
21
13
–
–
5
RES4
DIS4
28
20
12
–
–
4
RES3
DIS3
27
19
11
–
–
3
RES2
DIS2
26
18
10
–
–
2
RES1
DIS1
25
17
–
–
9
1
SAM9G25
SAM9G25
RES0
DIS0
24
16
–
–
8
0
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