SAM9G25 Atmel Corporation, SAM9G25 Datasheet - Page 482

• Manufacturer Part Number: SAM9G25
• Manufacturer: Atmel Corporation

Specifications of SAM9G25

• Flash (kbytes): 0 Kbytes
• Pin Count: 247
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 7
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

31.2.2
482
482
SAM9G25
SAM9G25
DMA Controller 1
The DMA controller can handle the transfer between peripherals and memory and so receives
the triggers from the peripherals listed below. The hardware interface numbers are also given in
Table
Table 31-2.
Instance name
HSMCI1
SPI1
SPI1
SMD
SMD
TWI1
TWI1
ADC
DBGU
DBGU
UART1
UART1
USART2
USART2
USART3
USART3
• Two Masters
• Embeds 8 channels
• 16-bytes FIFO per Channel
• features:
– Linked List support with Status Write Back operation at End of Transfer
– Word, HalfWord, Byte transfer support.
– Peripheral to memory
– Memory to peripheral
31-2.
DMA Channel Definition
T/R
RX/TX
TX
RX
TX
RX
TX
RX
RX
TX
RX
TX
RX
TX
RX
TX
RX
DMA Channel HW
interface Number
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
11032A–ATARM–27-Jul-11
11032A–ATARM–27-Jul-11