SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 184
SAM9G46
Manufacturer Part Number
SAM9G46
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G46.pdf
(58 pages)
Specifications of SAM9G46
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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22. Power Management Controller (PMC)
22.1
22.2
184
Description
Embedded Characteristics
SAM9G35
The Power Management Controller (PMC) optimizes power consumption by controlling all sys-
tem and user peripheral clocks. The PMC enables/disables the clock inputs to many of the
peripherals and the Core.
The Power Management Controller provides all the clock signals to the system.
PMC input clocks:
PMC output clocks:
Note:
This allows software control of five flexible operating modes:
• UPLLCK : From UTMI PLL
• PLLACK : From PLLA
• SLCK: slow clock from external 32 kHz oscillator or internal 32 kHz RC oscillator
• MAINCK: Main Clock from external 12 MHz oscillator or internal 12 MHz RC Oscillator
• Processor Clock PCK.
• Master Clock MCK, in particular to the Matrix, the memory interfaces, the peripheral bridge.
• Each peripheral embeds its own divider, programmable in the PMC User Interface.
• 133MHz DDR clock
• LCD pixel clock that can use DDR clock or MCK, the choice is done in the LCD user
• USB Host EHCI High speed clock (UPLLCK)
• USB OHCI clocks (UHP48M and UHP12M)
• Two programmable clock outputs: PCK0 and PCK1
• SMD clock
• Normal Mode, processor and peripherals running at a programmable frequency
• Idle Mode, processor stopped waiting for an interrupt
• Slow Clock Mode, processor and peripherals running at low frequency
• Standby Mode, mix of Idle and Backup Mode, peripheral running at low frequency, processor
• Backup Mode, Main Power Supplies off, VDDBU powered by a battery
The divider can be 2, 3 or 4.
interface.
stopped waiting for an interrupt
DDR clock is not available when Master Clock (MCK) equals Processor Clock (PCK).
11053B–ATARM–22-Sep-11
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