SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 986
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SAM9G46
Manufacturer Part Number
SAM9G46
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G46.pdf
(58 pages)
Specifications of SAM9G46
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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43.9.3
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CKS: Receive Clock Selection
• CKO: Receive Clock Output Mode Selection
• CKI: Receive Clock Inversion
0 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock falling edge. The Frame Sync signal
output is shifted out on Receive Clock rising edge.
1 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock rising edge. The Frame Sync signal out-
put is shifted out on Receive Clock falling edge.
CKI affects only the Receive Clock and not the output clock signal.
986
986
Value
Value
3-7
31
23
15
0
1
2
3
0
1
2
–
7
SAM9G35
SAM9G35
SSC Receive Clock Mode Register
CKG
Name
MCK
TK
RK
Name
NONE
CONTINUOUS
TRANSFER
30
22
14
SSC_RCMR
0xF0010010
Read-write
–
6
Description
Divided Clock
TK Clock signal
RK pin
Reserved
Description
None
Continuous Receive Clock
Receive Clock only during data transfers
Reserved
CKI
29
21
13
–
5
STOP
28
20
12
4
PERIOD
STTDLY
“SSC Write Protect Mode Register”
CKO
27
19
11
3
RK Pin
Input-only
Output
Output
26
18
10
2
START
.
25
17
9
1
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
CKS
24
16
8
0
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