SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 564

• Manufacturer Part Number: SAM9G46
• Manufacturer: Atmel Corporation

Specifications of SAM9G46

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

33.6.13.7
33.6.13.8
33.6.13.9
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564
SAM9G35
SAM9G35
Entering Suspend State (Bus Activity)
Receiving a Host Resume
Sending an External Resume
When a Suspend (no bus activity on the USB bus) is detected, the DET_SUSPD signal in the
UDPHS_STA register is set. This triggers an interrupt if the corresponding bit is set in the
UDPHS_IEN register. This flag is cleared by writing to the UDPHS_CLRINT register. Then the
device enters Suspend Mode.
In this state bus powered devices must drain less than 500 μA from the 5V VBUS. As an exam-
ple, the microcontroller switches to slow clock, disables the PLL and main oscillator, and goes
into Idle Mode. It may also switch off other devices on the board.
The UDPHS device peripheral clocks can be switched off. Resume event is asynchronously
detected.
In Suspend mode, a resume event on the USB bus line is detected asynchronously, transceiver
and clocks disabled (however the pull-up should not be removed).
Once the resume is detected on the bus, the signal WAKE_UP in the UDPHS_INTSTA is set. It
may generate an interrupt if the corresponding bit in the UDPHS_IEN register is set. This inter-
rupt may be used to wake-up the core, enable PLL and main oscillators and configure clocks.
In Suspend State it is possible to wake-up the host by sending an external resume.
The device waits at least 5 ms after being entered in Suspend State before sending an external
resume.
The device must force a K state from 1 to 15 ms to resume the host.
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11