SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 416

• Manufacturer Part Number: SAM9G46
• Manufacturer: Atmel Corporation

Specifications of SAM9G46

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

29.16 Static Memory Controller (SMC) User Interface
The SMC is programmed using the registers listed in
gram the parameters of the external device connected on it. In
16 bytes (0x10) are required per chip select.
The user must complete writing the configuration by writing any one of the SMC_MODE registers.
Table 29-8.
416
416
0x10 x CS_number + 0x00
0x10 x CS_number + 0x04
0x10 x CS_number + 0x08
0x10 x CS_number + 0x0C
0xC0
0xC4
0xC8
0xCC
0xD0
0xD4
0xD8
0xDC
0xE4
0xE8
0xEC-0xFC
SAM9G35
SAM9G35
Offset
Register Mapping
Register
SMC Setup Register
SMC Pulse Register
SMC Cycle Register
SMC Mode Register
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Delay on I/O
SMC Write Protect Mode
Register
SMC Write Protect Status
Register
Reserved
Table
29-8. For each chip select, a set of 4 registers is used to pro-
SMC_DELAY1
SMC_DELAY2
SMC_DELAY3
SMC_DELAY4
SMC_DELAY5
SMC_DELAY6
SMC_DELAY7
SMC_DELAY8
Table
SMC_SETUP
SMC_CYCLE
SMC_PULSE
SMC_WPMR
SMC_MODE
SMC_WPSR
Name
-
29-8, “CS_number” denotes the chip select number.
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Read-only
Access
-
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
0x01010101
0x01010101
0x00030003
0x10001000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
-