SAM3S8C Atmel Corporation, SAM3S8C Datasheet - Page 312

• Manufacturer Part Number: SAM3S8C
• Manufacturer: Atmel Corporation

18.5.1
Name:
Address:
Access:
Offset:
• FRDY: Ready Interrupt Enable
0: Flash Ready does not generate an interrupt.
1: Flash Ready (to accept a new command) generates an interrupt.
• FWS: Flash Wait State
This field defines the number of wait states for read and write operations:
• SCOD: Sequential Code Optimization Disable
0: The sequential code optimization is enabled.
1: The sequential code optimization is disabled.
No Flash read should be done during change of this register.
• FAM: Flash Access Mode
0: 128-bit access in read Mode only, to enhance access speed.
1: 64-bit access in read Mode only, to enhance power consumption.
No Flash read should be done during change of this register.
312
312
Number of cycles for Read/Write operations = FWS+1
31
23
15
–
–
–
7
–
SAM3S8/SD8
SAM3S8/SD8
EEFC Flash Mode Register
30
22
14
EEFC_FMR
0x400E0A00
Read-write
0x00
–
–
–
6
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
3
–
26
18
10
–
–
2
–
FWS
25
17
–
–
9
1
–
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
SCOD
FRDY
FAM
24
16
8
0