SAM3S8C Atmel Corporation, SAM3S8C Datasheet - Page 577

• Manufacturer Part Number: SAM3S8C
• Manufacturer: Atmel Corporation

28.9.3
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CKS: Receive Clock Selection
• CKO: Receive Clock Output Mode Selection
• CKI: Receive Clock Inversion
0 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock falling edge. The Frame Sync signal
output is shifted out on Receive Clock rising edge.
1 = The data inputs (Data and Frame Sync signals) are sampled on Receive Clock rising edge. The Frame Sync signal out-
put is shifted out on Receive Clock falling edge.
CKI affects only the Receive Clock and not the output clock signal.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Value
Value
3-7
31
23
15
0
1
2
3
0
1
2
–
7
SSC Receive Clock Mode Register
CKG
Name
MCK
TK
RK
Name
NONE
CONTINUOUS
TRANSFER
30
22
14
SSC_RCMR
0x40004010
Read-write
–
6
Description
Divided Clock
TK Clock signal
RK pin
Reserved
Description
None
Continuous Receive Clock
Receive Clock only during data transfers
Reserved
CKI
29
21
13
–
5
STOP
28
20
12
4
PERIOD
STTDLY
“SSC Write Protect Mode Register”
CKO
27
19
11
3
RK Pin
Input-only
Output
Output
26
18
10
2
START
SAM3S8/SD8
SAM3S8/SD8
.
25
17
9
1
CKS
24
16
8
0
577
577