AD5757 Analog Devices, AD5757 Datasheet - Page 26

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AD5757

Manufacturer Part Number
AD5757
Description
Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity
Manufacturer
Analog Devices
Datasheet

Specifications of AD5757

Resolution (bits)
16bit
Dac Update Rate
60kSPS
Dac Settling Time
15µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
Current Out
Dac Input Format
SPI

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AD5757
PROGRAMMING SEQUENCE TO WRITE/ENABLE
THE OUTPUT CORRECTLY
To correctly write to and set up the part from a power-on
condition, use the following sequence:
1.
2.
3.
4.
5.
A flowchart of this sequence is shown in Figure 51.
Figure 51. Programming Sequence for Enabling the Output Correctly
Perform a hardware or software reset after initial power-on.
The dc-to-dc converter supply block must be configured.
Set the dc-to-dc switching frequency, maximum output
voltage allowed, and the phase that the four dc-to-dc
channels clock at.
Configure the DAC control register on a per channel basis.
The output range is selected, and the dc-to-dc converter
block is enabled (DC_DC bit). Other control bits can be
configured at this point. Set the INT_ENABLE bit;
however, the output enable bit (OUTEN) should not be set.
Write the required code to the DAC data register. This
implements a full DAC calibration internally. Allow at least
200 μs before Step 5 for reduced output glitch.
Write to the DAC control register again to enable the
output (set the OUTEN bit).
STEP 1: PERFORM A SOFTWARE/HARDWARE RESET.
STEP 2: WRITE TO DC-TO-DC CONTROL REGISTER TO
STEP 3: WRITE TO DAC CONTROL REGISTER. SELECT
STEP 4: WRITE TO EACH/ALL DAC DATA REGISTERS.
STEP 5: WRITE TO DAC CONTROL REGISTER. RELOAD
SET DC-TO-DC CLOCK FREQUENCY, PHASE,
AND MAXIMUM VOLTAGE.
THE DAC CHANNEL AND OUTPUT RANGE.
SET THE DC_DC BIT AND OTHER CONTROL
BITS AS REQUIRED. SET THE INT_ENABLE BIT
BUT DO NOT SELECT THE OUTEN BIT.
SEQUENCE AS IN STEP 3 ABOVE. THIS TIME
SELECT THE OUTEN BIT TO ENABLE
THE OUTPUT.
ALLOW AT LEAST 200µs BETWEEN STEP 3
AND STEP 5 FOR REDUCED OUTPUT GLITCH.
POWER ON.
Rev. B | Page 26 of 44
CHANGING AND REPROGRAMMING THE RANGE
When changing between ranges, the same sequence as
described in the Programming Sequence to Write/Enable the
Output Correctly section should be used. It is recommended to
set the range to zero scale prior to disabling the output. Because
the dc-to-dc switching frequency, maximum voltage, and phase
have already been selected, there is no need to reprogram these.
A flowchart of this sequence is shown in Figure 52.
STEP 1: WRITE TO CHANNEL’S DAC DATA
STEP 2: WRITE TO DAC CONTROL REGISTER.
STEP 3: WRITE VALUE TO THE DAC DATA REGISTER.
STEP 4: WRITE TO DAC CONTROL REGISTER.
Figure 52. Steps for Changing the Output Range
REGISTER. SET THE OUTPUT
TO 0V (ZERO OR MIDSCALE).
DISABLE THE OUTPUT (OUTEN = 0), AND
SET THE NEW OUTPUT RANGE. KEEP THE
DC_DC BIT AND THE INT_ENABLE BIT SET.
RELOAD SEQUENCE AS IN STEP 2 ABOVE.
THIS TIME SELECT THE OUTEN BIT TO
ENABLE THE OUTPUT.
CHANNEL’S OUTPUT IS ENABLED.
Data Sheet

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