AD5757 Analog Devices, AD5757 Datasheet - Page 30

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AD5757

Manufacturer Part Number
AD5757
Description
Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity
Manufacturer
Analog Devices
Datasheet

Specifications of AD5757

Resolution (bits)
16bit
Dac Update Rate
60kSPS
Dac Settling Time
15µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
Current Out
Dac Input Format
SPI

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AD5757
DAC Control Register
The DAC control register is used to configure each DAC channel. The DAC control register options are shown in Table 19 and Table 20.
Table 19. Programming DAC Control Register
D15
0
1
Table 20. DAC Control Register Functions
Bit
INT_ENABLE
CLR_EN
OUTEN
RSET
DC_DC
R2, R1, R0
X = don’t care.
D14
1
D13
0
Per channel clear enable bit. Selects if this channel clears when the CLEAR pin is activated.
Selects an internal or external current sense resistor for the selected DAC channel.
Powers the dc-to-dc converter on the selected channel.
Selects the output range to be enabled.
Description
Powers up the dc-to-dc converter, DAC, and internal amplifiers for the selected channel. Does not enable the output. Can
only be done on a per channel basis. It is recommended to set this bit and allow a >200 μs delay before enabling the
output because this results in a reduced output enable glitch. Plots of this glitch can be found in Figure 25.
CLR_EN = 1, channel clears when the part is cleared.
CLR_EN = 0, channel does not clear when the part is cleared (default).
Enables/disables the selected output channel.
OUTEN = 1, enables the channel.
OUTEN = 0, disables the channel (default).
RSET = 0, selects the external resistor (default).
RSET = 1, selects the internal resistor.
DC_DC = 1, power up the dc-to-dc converter.
DC_DC = 0, power down the dc-to-dc converter (default).
This allows per channel dc-to-dc converter power-up/power-down. To power down the dc-to-dc converter, the OUTEN and
INT_ENABLE bits must also be set to 0.
All dc-to-dc converters can also be powered up simultaneously using the DCDC_ALL bit in the main control register.
R2
1
1
1
D12
X
1
D11
X
R1
0
0
1
1
D10
X
1
R0
0
1
0
D9
X
1
D8
INT_ENABLE
Rev. B | Page 30 of 44
Output Range Selected
4 mA to 20 mA current range
0 mA to 20 mA current range
0 mA to 24 mA current range
D7
CLR_EN
D6
OUTEN
D5
RSET
D4
DC_DC
D3
X
1
Data Sheet
D2
R2
D1
R1
D0
R0

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