AD5757 Analog Devices, AD5757 Datasheet - Page 38

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AD5757

Manufacturer Part Number
AD5757
Description
Quad Channel, 16-Bit, Serial Input, 4-20mA Output DAC, Dynamic Power Control, HART Connectivity
Manufacturer
Analog Devices
Datasheet

Specifications of AD5757

Resolution (bits)
16bit
Dac Update Rate
60kSPS
Dac Settling Time
15µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
Current Out
Dac Input Format
SPI

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AD5757
DC-to-DC Converter Compensation Capacitors
As the dc-to-dc converter operates in DCM, the uncompensated
transfer function is essentially a single-pole transfer function.
The pole frequency of the transfer function is determined by
the dc-to-dc converter’s output capacitance, input and output
voltage, and output load. The AD5757 uses an external capaci-
tor in conjunction with an internal 150 kΩ resistor to compensate
the regulator loop. Alternatively, an external compensation
resistor can be used in series with the compensation capacitor
by setting the DC-DC Comp bit in the dc-to-dc control register.
In this case, a ~50 kΩ resistor is recommended. A description
of the advantages of this can be found in the AI
Requirements—Slewing section. For typical applications, a
10 nF dc-to-dc compensation capacitor is recommended.
DC-to-DC Converter Input and Output Capacitor
Selection
The output capacitor affects ripple voltage of the dc-to-dc con-
verter and indirectly limits the maximum slew rate at which the
channel output current can rise. The ripple voltage is caused by
a combination of the capacitance and equivalent series resistance
(ESR) of the capacitor. For the AD5757, a ceramic capacitor
of 4.7 μF is recommended for typical applications. Larger
capacitors or paralleled capacitors improve the ripple at the
expense of reduced slew rate. Larger capacitors also impact
the AV
AI
at the output of the dc-to-dc converter should be >3 μF under
all operating conditions.
The input capacitor provides much of the dynamic current
required for the dc-to-dc converter and should be a low ESR
component. For the AD5757, a low ESR tantalum or ceramic
capacitor of 10 μF is recommended for typical applications.
Ceramic capacitors must be chosen carefully because they can
exhibit a large sensitivity to dc bias voltages and temperature.
X5R or X7R dielectrics are preferred because these capacitors
remain stable over wider operating voltage and temperature
ranges. Care must be taken if selecting a tantalum capacitor to
ensure a low ESR value.
AI
The dc-to-dc converter is designed to supply a V
See Figure 31 for a plot of headroom supplied vs. output
voltage. This means that, for a fixed load and output voltage,
the dc-to-dc converter output current can be calculated by
the following formula:
where:
I
η
and Figure 34).
OUT
V
BOOST
CC
CC
is the output current from I
V
Supply Requirements—Slewing section). This capacitance
SUPPLY REQUIREMENTS—STATIC
AI
BOOST
CC
is the efficiency at V
CC
supplies current requirements while slewing (see the
=
= I
Efficiency
OUT
Power
× R
LOAD
×
Out
AV
+ Headroom
BOOST_x
CC
=
OUT_x
η
as a fraction (see Figure 33
I
V
OUT
BOOST
in amps.
×
V
×
BOOST
AV
BOOST_x
CC
CC
Supply
voltage of
Rev. B | Page 38 of 44
(2)
(3)
AI
The AI
static operation because the output power increases to charge
the output capacitance of the dc-to-dc converter. This transient
current can be quite large (see Figure 58), although the methods
described in the Reducing AI
can reduce the requirements on the AV
AI
this AV
further. This means that the voltage at AV
Equation 3) and the V
age, may never reach its intended value. Because this AV
voltage is common to all channels, this may also affect other
channels.
Reducing AI
There are two main methods that can be used to reduce the
AI
compensation resistor, and the other is to use slew rate control.
Both of these methods can be used in conjunction.
A compensation resistor can be placed at the COMP
in series with the 10 nF compensation capacitor. A 51 kΩ external
compensation resistor is recommended. This compensation
increases the slew time of the current output but eases the AI
transient current requirements. Figure 59 shows a plot of AI
current for a 24 mA step through a 1 kΩ load when using a
51 kΩ compensation resistor. This method eases the current
requirements through smaller loads even further, as shown in
Figure 60.
CC
CC
CC
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Figure 58. AI
0
current can be provided, the AV
current requirements. One method is to add an external
SUPPLY REQUIREMENTS—SLEWING
0
CC
CC
current requirement while slewing is greater than in
drop, the AI
CC
CC
0.5
Current Requirements
with Internal Compensation Resistor
Current vs. Time for 24 mA Step Through 1 kΩ Load
AI
I
V
OUT
BOOST
CC
CC
BOOST_x
current required to slew increases
1.0
INDUCTOR = 10µH (XAL4040-103)
TIME (ms)
voltage, and thus the output volt-
CC
Current Requirements section
1.5
0mA TO 24mA RANGE
CC
CC
voltage drops. Due to
supply. If not enough
CC
f
SW
2.0
drops further (see
1kΩ LOAD
T
= 410kHz
A
Data Sheet
= 25°C
DCDC_x
2.5
30
25
20
15
10
5
0
CC
pin
CC
CC

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