ADAU1445 Analog Devices, ADAU1445 Datasheet - Page 64

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ADAU1445

Manufacturer Part Number
ADAU1445
Description
Manufacturer
Analog Devices
Datasheet

Specifications of ADAU1445

Instructions/cycles
3584
Digital I/o Channels
24/24
Analog I/o Channels
0/0
Product Description
Digital audio processor with flexible audio routing matrix, 8 × 2-channel ASRC

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ADAU1442/ADAU1445/ADAU1446
RAMS
The ADAU1442/ADAU1445/ADAU1446 have 4k words of
program RAM, 4k words of parameter RAM, and 8k words of
data RAM.
Program RAM
Table 48. Register Details of Program RAM
Decimal
8192
The program RAM contains the 43-bit operation codes that are
executed by the core. It is important to note that although the
length of the RAM is 4096, only 3584 instructions can be
executed in the span of a single frame for normal rate signals.
For dual-rate processing, the maximum allowable instruction
count is 1792, and for quad-rate processing, the maximum
allowable instruction count is 896. For more information on
setting the DSP core rate, see the DSP Core Rate Select Register
(Address 0xE220) section.
The additional program space can be used with optimized
algorithms and jump commands. The SigmaStudio compiler
calculates maximum instructions per frame for a project and
generates an error when the value exceeds the maximum allowable
instructions per frame based on the sample rate of the signals in
the core.
Because the end of a program contains a jump-to-start command,
the remaining program RAM space does not need to be filled
with no-operation (NOP) commands.
Program Counter Peak Count Register (Address 0xE229)
Table 49. Bit Descriptions of Register 0xE229
Bit Position
[15:0]
This 16-bit, read-only register keeps track of how many cycles
elapse from the start of the program until the program counter
is reset. The register is updated on every start pulse.
This register should not be used if the watchdog error sticky bit
has been activated, which indicates that the maximum allowable
clock cycles per frame have been exceeded. In this case, the
program counter peak value may be inaccurate.
Address
Hex
2000
Description
Program counter peak count (read only)
Name
Program RAM
Read/Write
Word Length
43 bits (6 bytes)
Rev. C | Page 64 of 92
Parameter RAM
Table 50. Register Details of Parameter RAM
Decimal
0
The parameter RAM contains all 28-bit values that are used by
algorithms running in the DSP core. SigmaStudio automatically
assigns the first eight positions to safeload parameters; therefore,
project-specific parameters start at Address 0x0008.
Data RAM
Table 51. Register Details of Data RAM
Decimal
16384
The data RAM stores audio data that must be accessed by the
core for more than one frame. Unlike previous generations of
SigmaDSP architectures, which used a hardware-based modulo
structure, the ADAU1442/ADAU1445/ADAU1446 have a
software-based modulo scheme that is controlled by the
programmer.
The data RAM should be initialized to all 0s before a boot-up
operation is performed to avoid an undefined startup state.
SigmaStudio inserts the appropriate data RAM initialization
code into projects by default.
Modulo Data Memory Register (Address 0xE21F)
Table 52. Bit Descriptions of Register 0xE21F
Bit
Position
[15:14]
[13:0]
This is a single 14-bit register that sets the start of the
nonmodulo space of the data memory. The default value is
7936 decimal. SigmaStudio sets this value by default based on
the addressing scheme used in the SigmaStudio project. The
value should not be modified by the user.
Address
Address
Description
Reserved.
Nonmodulo data memory start.
The setting is the address in
memory.
Hex
0000
Hex
4000
Name
Parameter RAM
Name
Data RAM
Read/Write
Word Length
28 bits (4 bytes)
Read/Write
Word Length
28 bits (4 bytes)
Default
01111100000000

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