LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 25

The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2

LPC1850FET256

Manufacturer Part Number
LPC1850FET256
Description
The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
Manufacturer
NXP Semiconductors
Datasheet

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Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P4_8
P4_9
P4_10
P5_0
Pin description
E2
L2
M3
N3
x
x
x
x
…continued
-
-
-
-
23
48
51
53
All information provided in this document is subject to legal disclaimers.
15
33
35
37
Rev. 3.1 — 15 December 2011
-
-
-
-
[3]
[3]
[3]
[3]
I; PU -
I; PU -
I; PU -
I; PU I/O GPIO2[9] — General purpose digital input/output pin.
I
O
-
I/O GPIO5[12] — General purpose digital input/output
O
O
-
I
O
-
I/O GPIO5[13] — General purpose digital input/output
O
I
-
I
O
-
I/O GPIO5[14] — General purpose digital input/output
O
-
-
O
I/O EMC_D12 — External memory data line 12.
-
I
I
-
-
Description
R — Function reserved.
CTIN_5 — SCT input 5. Capture input 2 of timer 2.
LCD_VD9 — LCD data.
R — Function reserved.
pin.
LCD_VD22 — LCD data.
CAN1_TD — CAN1 transmitter output.
R — Function reserved.
R — Function reserved.
CTIN_6 — SCT input 6. Capture input 1 of timer 3.
LCD_VD11 — LCD data.
R — Function reserved.
pin.
LCD_VD15 — LCD data.
CAN1_RD — CAN1 receiver input.
R — Function reserved.
R — Function reserved.
CTIN_2 — SCT input 2. Capture input 2 of timer 0.
LCD_VD10 — LCD data.
R — Function reserved.
pin.
LCD_VD14 — LCD data.
R — Function reserved.
R — Function reserved.
MCOB2 — Motor control PWM channel 2, output B.
R — Function reserved.
U1_DSR — Data Set Ready input for UART1.
T1_CAP0 — Capture input 0 of timer 1.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
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