ST72334N4 STMicroelectronics, ST72334N4 Datasheet - Page 80

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ST72334N4

Manufacturer Part Number
ST72334N4
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72334N4

Clock Sources
crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
4 Power Saving Modes
Halt, Active-Halt, Wait and Slow
Two 16-bit Timers With
2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes
ST72334J/N, ST72314J/N, ST72124J
SERIAL PERIPHERAL INTERFACE (Cont’d)
14.4.4.7 Single Master and Multimaster Configurations
There are two types of SPI systems:
– Single Master System
– Multimaster System
Single Master System
A typical single master system may be configured,
using an MCU as the master and four MCUs as
slaves (see
The master device selects the individual slave de-
vices by using four pins of a parallel port to control
the four SS pins of the slave devices.
The SS pins are pulled high during reset since the
master device ports will be forced to be inputs at
that time, thus disabling the slave devices.
Note: To prevent a bus conflict on the MISO line
the master allows only one active slave device
during a transmission.
Figure 47. Single Master Configuration
80/153
5V
Figure
MOSI
SS
SCK
SCK
MOSI
Master
MCU
MCU
47).
Slave
MISO
MISO
SS
MOSI
SCK
Slave
MCU
MISO
SS
For more security, the slave device may respond
to the master with the received data byte. Then the
master will receive the previous byte back from the
slave device if all MISO and MOSI pins are con-
nected and the slave has not written its DR regis-
ter.
Other transmission security methods can use
ports for handshake lines or data bytes with com-
mand fields.
Multi-master System
A multi-master system may also be configured by
the user. Transfer of master control could be im-
plemented using a handshake method through the
I/O ports or by an exchange of code messages
through the serial peripheral interface system.
The multi-master system is principally handled by
the MSTR bit in the CR register and the MODF bit
in the SR register.
MOSI
SCK
MCU
Slave
MISO
SS
MOSI
SCK
MCU
Slave
MISO
SS

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