ST72334N4 STMicroelectronics, ST72334N4 Datasheet - Page 96

• Manufacturer Part Number: ST72334N4
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, SCI INTERFACES
• Manufacturer: STMicroelectronics

Specifications of ST72334N4

• Clock Sources: crystal/ceramic resonator oscillators or RC oscillators, external clock, backup Clock Security System
• 4 Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Two 16-bit Timers With: 2 input captures (only one on timer A), 2 output compares (only one on timer A), External clock input on timer A, PWM and Pulse generator modes

ST72334J/N, ST72314J/N, ST72124J
SERIAL COMMUNICATIONS INTERFACE (Cont’d)
EXTENDED RECEIVE PRESCALER DIVISION
REGISTER (ERPR)
Read/Write
Reset Value: 0000 0000 (00 h)
Allows setting of the Extended Prescaler rate divi-
sion factor for the receive circuit.
Bit 7:1 = ERPR[7:0] 8-bit Extended Receive Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ERPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
Table 18. SCI Register Map and Reset Values
96/153
ERPR
Address
(Hex.)
7
7
0050h
0051h
0052h
0053h
0054h
0055h
0057h
ERPR
6
SCISR
Reset Value
SCIDR
Reset Value
SCIBRR
Reset Value
SCICR1
Reset Value
SCICR2
Reset Value
SCIPBRR
Reset Value
SCIPBRT
Reset Value
Register
ERPR
Label
5
ERPR
4
TDRE
ERPR
MSB
SOG
MSB
MSB
TIE
R8
7
3
1
x
0
x
0
0
0
ERPR
2
TCIE
TC
T8
6
0
1
x
0
x
0
0
ERPR
1
ERPR
RDRF
VPOL
0
0
RIE
5
0
x
x
0
0
0
0
EXTENDED TRANSMIT PRESCALER DIVISION
REGISTER (ETPR)
Read/Write
Reset Value:0000 0000 (00h)
Allows setting of the External Prescaler rate divi-
sion factor for the transmit circuit.
Bit 7:1 = ETPR[7:0] 8-bit Extended Transmit Pres-
caler Register.
The extended Baud Rate Generator is activated
when a value different from 00h is stored in this
register. Therefore the clock frequency issued
from the 16 divider (see Figure 3.) is divided by the
binary factor set in the ETPR register (in the range
1 to 255).
The extended baud rate generator is not used af-
ter a reset.
2FHDET
ETPR
IDLE
ILIE
7
7
M
4
0
x
x
x
0
0
0
ETPR
6
HVSEL
WAKE
OR
TE
ETPR
3
0
0
0
0
x
x
x
5
ETPR
VCORDIS
4
RE
NF
2
0
0
0
0
0
x
x
ETPR
3
CLPINV
RWU
ETPR
FE
1
0
x
x
0
0
0
0
2
ETPR
1
BLKINV
SBK
LSB
LSB
LSB
0
0
0
0
0
0
x
x
ETPR
0
0