S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 129

• Manufacturer Part Number: S1D13700F02
• Description: Embedded Memory Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
X42D-A-001-01
X42D-A-001-01
X42D-A-001-00
Hardware Functional Specification
Issue Date: 2005/11/29
• all changes from the last revision of the spec are highlighted in Red
• section 7.2, changed references to “S1D13700F02” instead of “S1D13700F01”
• section 11.1.1, fixed an inconsistency in the description of SYSTEM SET parameter P1,
• all changes from the last revision of the spec are highlighted in Red
• section 5.1, changed chip number from “D1370001A1” to “D1370002A1”
• all changes from the last revision of the spec are highlighted in Red
• fixed product number in footer, should be S1D13700F02 instead of S1D13700F01
• section 5.2, for all pin tables, changed the “RESET# State” column to “RESET#/Power
• section 5.2, for all pin tables, changed all input pins from “Z” to “—”
• section 5.2, added “X” and “—” to the RESET# and Power On State definitions
• section 7.3.1, for the Generic Bus Direct/Indirect Interface with WAIT# Timing
• section 7.3.1, for the Generic Bus Direct/Indirect Interface with WAIT# Timing table,
• section 7.3.2, for the Generic Bus Direct/Indirect Interface without WAIT# Timing
• section 7.3.2, for the Generic Bus Direct/Indirect Interface without WAIT# Timing
• section 7.3.3, for the MC68K Family Bus Direct/Indirect Interface with DTACK#
• section 7.3.5, for the M6800 Family Bus Indirect Interface Timing diagram, removed
• section 7.5, for the Single Monochrome 4-bit Panel AC Timing table, removed Note 1
• REG[03h], for the Character Bytes Per Row bits, changed the maximum from “239” to
Revision 1.01 - Issued: November 29, 2005
Revision 1.0 - Issued: November 21, 2005
Revision 0.02 - Issued: November 18, 2005
bit 4 should be 1b according to the value of Reserved bit REG[00h] bit 4
On State”
diagram, changed t10 to be from CS# rising edge instead of RD# rising edge
changed the t10 parameter description to be from CS# rising edge instead of RD# rising
edge
diagram, changed t8 to be from CS# rising edge instead of RD# rising edge
table, changed the t8 parameter description to be from CS# rising edge instead of RD#
rising edge
Timing diagram, changed t8 to extend to the edge where DTACK# goes high impedance
reference to MR# and changed “RD# (LDS#, UDS#)” to “RD# (E)”
about Ts, changed Note 2 to Note 1, and added new note with correct formula for t10
“253”
Change Record
Revision 1.01
X42D-A-001-01
S1D13700F02
Page 129