S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 55

• Manufacturer Part Number: S1D13700F02
• Description: Embedded Memory Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Epson Research and Development
Vancouver Design Center
bits 15-0
bits 7-0
Hardware Functional Specification
Issue Date: 2005/11/29
REG[0Eh] Screen Block 2 Start Address Register 0
Address = 800Eh
REG[0Fh] Screen Block 2 Start Address Register 1
Address = 800Fh
REG[10h] Screen Block 2 Size Register
Address = 8010h
7
7
7
6
6
6
Default = 00h
Default = 00h
Default = 00h
Note
Note
Screen Block 2 Start Address (SAD2) bits [15:0]
These bits determine the memory start address of screen block 2.
Screen Block 2 Size (SL2) bits [7:0]
These bits determine the size of screen block 2, in lines.
When the start address is changed, the LSB must be programmed before the MSB. The
start address does not change until the MSB is written.
The relationship between the screen block start address (SADx), screen block size
(SLx), and the display mode is described in Table 10-7 “Display Modes,” on page 57.
REG[10h] bits 7-0 = screen block 2 size in number of lines - 1
5
5
5
Screen Block 2 Start Address bits 15-8 (MSB)
Screen Block 2 Start Address bits 7-0 (LSB)
Screen Block 2 Size bits 7-0
4
4
4
Revision 1.01
3
3
3
2
2
2
1
1
1
Read/Write
Read/Write
Read/Write
X42D-A-001-01
S1D13700F02
0
0
0
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