S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 54
S1D13700F02
Manufacturer Part Number
S1D13700F02
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13700F02.pdf
(130 pages)
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Page 54
SCROLL
bits 15-0
bits 7-0
S1D13700F02
X42D-A-001-01
REG[0Bh] Screen Block 1 Start Address Register 0
Address = 800Bh
REG[0Ch] Screen Block 1 Start Address Register 1
Address = 800Ch
REG[0Dh] Screen Block 1 Size Register
Address = 800Dh
7
7
7
6
6
6
Default = 00h
Default = 00h
Default = 00h
Note
Note
The SCROLL command is used to configure the display start addresses for the various
screen blocks when indirect addressing is used. The values from REG[0Bh] through
REG[14h] are passed as parameters when the SCROLL command is issued. For further
information on the SCROLL command, see Section 11.1.4, “SCROLL” on page 72.
Screen Block 1 Start Address (SAD1) bits [15:0]
These bits determine the memory start address of screen block 1.
Screen Block 1 Size (SL1) bits [7:0]
These bits determine the size of screen block 1, in lines.
When the start address is changed, the LSB must be programmed before the MSB. The
start address does not change until the MSB is written.
The relationship between the screen block start address (SADx), screen block size
(SLx), and the display mode is described in Table 10-7 “Display Modes,” on page 57.
REG[0Dh] bits 7-0 = screen block 1 size in number of lines - 1
5
5
5
Screen Block 1 Start Address bits 15-8 (MSB)
Screen Block 1 Start Address bits 7-0 (LSB)
Screen Block 1 Size bits 7-0
4
4
4
Revision 1.01
3
3
3
2
2
2
Epson Research and Development
Hardware Functional Specification
1
1
1
Vancouver Design Center
Issue Date: 2005/11/29
Read/Write
Read/Write
Read/Write
0
0
0
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