S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 56
S1D13700F02
Manufacturer Part Number
S1D13700F02
Description
Embedded Memory Graphics Lcd Controller
Manufacturer
Epson Electronics America, Inc.
Datasheet
1.S1D13700F02.pdf
(130 pages)
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bits 15-0
bits 15-0
S1D13700F02
X42D-A-001-01
REG[11h] Screen Block 3 Start Address Register 0
Address = 8011h
REG[12h] Screen Block 3 Start Address Register 1
Address = 8012h
REG[13h] Screen Block 4 Start Address Register 0
Address = 8013h
REG[14h] Screen Block 4 Start Address Register 1
Address = 8014h
7
7
7
7
6
6
6
6
Default = 00h
Default = 00h
Default = 00h
Default = 00h
Note
Note
Screen Block 3 Start Address (SAD3) bits [15:0]
These bits determine the memory start address of screen block 3.
Screen Block 4 Start Address (SAD4) bits [15:0]
These bits determine the memory start address of screen block 4.
When the start address is changed, the LSB must be programmed before the MSB. The
start address does not change until the MSB is written.
When the start address is changed, the LSB must be programmed before the MSB. The
start address does not change until the MSB is written.
5
5
5
5
Screen Block 3 Start Address bits 15-8 (MSB)
Screen Block 4 Start Address bits 15-8 (MSB)
Screen Block 3 Start Address bits 7-0 (LSB)
Screen Block 4 Start Address bits 7-0 (LSB)
4
4
4
4
Revision 1.01
3
3
3
3
2
2
2
2
Epson Research and Development
Hardware Functional Specification
1
1
1
1
Vancouver Design Center
Issue Date: 2005/11/29
Read/Write
Read/Write
Read/Write
Read/Write
0
0
0
0
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