S1D13700F02 Epson Electronics America, Inc., S1D13700F02 Datasheet - Page 20

• Manufacturer Part Number: S1D13700F02
• Description: Embedded Memory Graphics Lcd Controller
• Manufacturer: Epson Electronics America, Inc.

Page 20
5.3 Summary of Configuration Options
S1D13700F02
X42D-A-001-01
Configuration
CNF[3:2]
CNF[1:0]
CNF4
Input
Indirect Addressing Mode:
Select the host bus interface as follows:
Select the FPSHIFT cycle time (FPSHIFT:Clock Input) as follows:
Note
These pins are used for configuration of the chip and must be connected directly to
HIOVDD or VSS.
The state of CNF[4:0] can be set at any time before or during operation of the
S1D13700F02.
1-bit address bus
8-bit data bus
9 pins are used
CNF3 CNF2
0
0
1
1
CNF1 CNF0
0
0
1
1
1 (connected to HIOVDD)
Table 5-6: Summary of Configuration Options
0
1
0
1
0
1
0
1
Host Bus
Generic Bus
Reserved
M6800 Family Bus Interface
MC68K Family Bus Interface
FPSHIFT Cycle Time
4:1
8:1
16:1
Reserved
Revision 1.01
Configuration State
DIrect Addressing Mode:
16-bit address bus
8-bit data bus
24 pins are used
0 (connected to VSS)
Epson Research and Development
Hardware Functional Specification
Vancouver Design Center
Issue Date: 2005/11/29