XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 12
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XA-SCC
Manufacturer Part Number
XA-SCC
Description
Cmos 16-bit Communications Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1.XA-SCC.pdf
(42 pages)
Philips Semiconductors
1999 Feb 23
SCC1 Write Register 13
SCC1 Write Register 14
SCC1 Write Register 15
SCC1 Write Register 16
SCC1 Write Register 17
SCC1 Read Register 0
SCC1 Read Register 1
Reserved
SCC1 Read Register 3
see WR16 and 17
SCC1 Read Register 6
SCC1 Read Register 7
SCC1 Read Register 8
Reserved
SCC1 Read Register 10
Reserved
SCC2 Write Register 0
SCC2 Write Register 1
SCC2 Write Register 2
SCC2 Write Register 3
SCC2 Write Register 4
SCC2 Write Register 5
SCC2 Write Register 6
SCC2 Write Register 7
SCC2 Write Register 8
SCC2 Write Register 9
SCC2 Write Register 10
SCC2 Write Register 11
SCC2 Write Register 12
SCC2 Write Register 13
SCC2 Write Register 14
SCC2 Write Register 15
SCC2 Write Register 16
SCC2 Write Register 17
SCC2 Read Register 0
SCC2 Read Register 1
Reserved
SCC2 Read Register 3
see WR16 and 17
SCC2 Read Register 6
SCC2 Read Register 7
SCC2 Read Register 8
Reserved
SCC2 Read Register 10
Reserved
CMOS 16-bit communications microcontroller
MMR Name
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Size
SCC2 Registers
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8A8–8AAh see WR16 and WR17 above
8B6–8BEh
868–86Ah
876–87Eh
Address
12
Offset
8ACh
85Ah
85Ch
85Eh
86Ah
86Ch
86Eh
88Ah
88Ch
88Eh
89Ah
89Ch
89Eh
8A8h
8AAh
8A0h
8A2h
8A4h
8A6h
8AEh
8B0h
8B2h
8B4h
868h
860h
862h
864h
866h
870h
872h
874h
880h
882h
884h
886h
888h
890h
892h
894h
896h
898h
Upper Byte of Baud rate time constant
Misc. Control bits
External/Status interrupt control
Match Character 2 (WR16)
Match Character 3 (WR17)
Tx/Rx buffer and external status
Receive condition status/residue code
Interrupt Pending Bits
see WR16 and WR17 above
SDLC byte count low register
SDLC byte count high & FIFO status
Receive Buffer
Loop/clock status
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx misc. parameters & mode
Tx. parameter and control
Sync character or SDLC address field or Match
Character 0
Sync character or SDLC flag or Match Character 1
Transmit Data Buffer
Master Interrupt control
Misc. Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
Upper Byte of Baud rate time constant
Misc. Control bits
External/Status interrupt control
Match Character 2 (wr16)
Match Character 3 (wr17)
Tx/Rx buffer and external status
Receive condition status/residue code
Interrupt Pending Bits
SDLC byte count low register
SDLC byte count high & FIFO status
Receive Buffer
Loop/clock status
Description
Preliminary specification
XA-SCC
Reset
Value
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
f8h
f8h
xx
—
—
—
—
—
—
—
—
—
—
—
xx
xx
xx
xx
xx
xx
xx
—
—
—
—
—
—
—
—
—
—
—