XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 36
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XA-SCC
Manufacturer Part Number
XA-SCC
Description
Cmos 16-bit Communications Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1.XA-SCC.pdf
(42 pages)
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Philips Semiconductors
1999 Feb 23
CMOS 16-bit communications microcontroller
BLE, WE
A19–A1
OE, BLE, CS
ClkOut
D7–D0
D[7:0]
ClkOut
t
CHAV
CS
A0
NOTES: BHE remains high (inactive) for all accesses on an 8 bit bus.
A burst code fetch can be from 1 to 8 words (1 word = 2 bytes), a 2 word fetch is shown here.
To meet the required Data In Hold time, data should be held on the bus at least until the earliest of CS, BLE, OE goes high, or until the address changes, whichever occurs
first.
OE is inactive during all writes.
t
CHAV
t
AVSL
t
CHSL
EVEN ADDRESS
t
CHSL
t
CHAV
NOTE 3
t
Figure 17. Burst Code Fetch on 8 bit bus, Generic Memory
DIS
LS BYTE
Figure 18. Generic 16 Bit Write on 8 Bit Bus
Note 2
t
DIH
t
CHAV
ADDRESS + 1
t
DIS
MS BYTE
t
t
SHDH
SHAH
Note 2
t
DIH
36
t
CHAV
ADDRESS + 2
t
DIS
LS BYTE
Note 2
t
DIH
t
t
t
DVSL
AVSL
CHAV
ADDRESS + 3
t
DIS
MS BYTE
Note 2
t
DIH
t
CHSH
t
SHAH
Preliminary specification
XA-SCC
t
CHSH
SU01138
SU01139
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