XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 29

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XA-SCC

Manufacturer Part Number
XA-SCC
Description
Cmos 16-bit Communications Microcontroller
Manufacturer
NXP Semiconductors
Datasheet
1. See notes after the 3.3V AC timing table.
Philips Semiconductors
PRELIMINARY AC ELECTRICAL CHARACTERISTICS (5.0V
V
NOTE:
1999 Feb 23
All Cycles
All DRAM cycles
Data Read and Instruction Fetch Cycles
Wait Input
Generic Data Read Only
Write Cycles
Refresh
DD
SYMBOL
CMOS 16-bit communications microcontroller
t
t
t
t
t
t
t
t
t
t
t
t
t
= 5.0V
t
t
t
t
t
t
CPWH
CHCX
CHAH
CHSH
CODH
CPWL
OHDE
CHDV
SHAH
SHDH
CLCX
CLCH
CHCL
CHAV
CHSL
DVSL
AVSL
AHDR
t
CLRL
t
t
t
t
F
DIS
DIH
WS
WH
t
RP
C
C
10%, T
13, 14, 16,
12–14, 16,
10, 12, 13,
20, 21, 22
17, 20, 21
16, 20, 21
FIGURE
13, 21
11, 16
9, 10,
9, 16
25
25
25
25
25
All
All
All
All
All
26
24
21
24
24
amb
= –40 C to +85 C (industrial)
System Clock Frequency
System Clock Period = 1/F
XTALIN High Time
XTALIN Low Time
XTALIN Rise Time
XTALIN Fall Time
Address Valid to Strobe low
Address hold after CLKOUT rising edge
Delay from CLKOUT rising edge to address valid
Delay from CLKOUT rising edge to Strobe High
Delay from CLKOUT rising edge to Strobe Low
ClkOut Duty Cycle High (into 40pF max.)
(See Warning Note 5 on page 31.)
CAS Pulse Width High
CAS Pulse Width Low
RAS precharge time, thus minimum RAS high time
Data In Valid setup to ClkOut rising edge
Data In Valid hold after ClkOut rising edge
OE high to XA Data Bus Driver Enable
Clock High to Data Valid
Data Valid prior to Strobe Low
Minimum Address Hold Time after strobe goes inactive
Data hold after strobes (CS and BHE/BLE) high
CAS low to RAS low
WAIT setup (stable high or low) to CLKOUT rising edge
WAIT hold (stable high or low) after CLKOUT rising edge
Address hold (A19–A1 only, not A0) after CS, BLE, BHE rise at end
of Generic Data Read Cycle (not code fetch)
C
PARAMETER
9
2
29
9
9
8
10%)
1
(n * t
t
t
t
t
t
t
t
t
t
t
t
CHCX
note 8
C
33.33
C
C
C
t
C
C
C
C
C
C
C
MIN
* 0.5
* 0.4
25
20
– 21
– 12
– 10
– 14
– 23
– 25
– 25
– 15
C
0
1
1
0
0
1
–12
) –16
–7
LIMITS
t
CHCX
Preliminary specification
MAX
30
25
21
19
25
5
5
+3
XA-SCC
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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