XA-SCC NXP Semiconductors, XA-SCC Datasheet - Page 14

• Manufacturer Part Number: XA-SCC
• Description: Cmos 16-bit Communications Microcontroller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
1999 Feb 23
Buffer Bound Register Ch.1 Rx
Address Pointer Reg Ch.1 Rx
Byte Count Register Ch.1 Rx
Data FIFO Register Ch.1 Lo Rx
Data FIFO Register Ch.1 Hi Rx
DMA Control Register Ch.2 Rx
FIFO Control & Status Register Ch.2 Rx
Segment Register Ch. 2 Rx
Buffer Base Register Ch. 2 Rx
Buffer Bound Register Ch.2 Rx
Address Pointer Reg Ch.2 Rx
Byte Count Register Ch.2 Rx
Data FIFO Register Ch.2 Lo Rx
Data FIFO Register Ch.2 Hi Rx
DMA Control Register Ch.3 Rx
FIFO Control & Status Register Ch.3 Rx
Segment Register Ch. 3 Rx
Buffer Base Register Ch. 3 Rx
Buffer Bound Register Ch.3 Rx
Address Pointer Reg Ch.3 Rx
Byte Count Register Ch.3 Rx
Data FIFO Register Ch.3 Lo Rx
Data FIFO Register Ch.3 Hi Rx
DMA Control Register Ch.0 Tx
FIFO Control & Status Register Ch.0 Tx
Segment Register Ch. 0 Tx
Buffer Base Register Ch. 0 Tx
Buffer Bound Register Ch.0 Tx
Address Pointer Reg Ch.0 Tx
Byte Count Register Ch.0 Tx
Data FIFO Register Ch.0 Tx
Data FIFO Register Ch.0 Tx
DMA Control Register Ch.1 Tx
FIFO Control & Status Register Ch.1 Tx
Segment Register Ch.1 Tx
CMOS 16-bit communications microcontroller
MMR Name
Read/Write or
Read Only
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Size
Tx DMA Registers
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
14
Offset
11Ch
12Ah
12Ch
12Eh
13Ah
13Ch
13Eh
14Ah
14Ch
14Eh
11Ah
11Eh
120h
121h
122h
124h
126h
128h
130h
131h
132h
134h
136h
138h
140h
141h
142h
144h
146h
148h
150h
151h
152h
116h
118h
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
11Ch = Byte 0 = older,
11Dh = Byte 1 = younger
11Eh = Byte 2 = older,
11Fh = Byte 3 = younger
Control Register
Control & Status Register
Points to 64K data segment
Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
12Ch = Byte 0 = older,
12Dh = Byte 1 = younger
12Eh = Byte 2 = older,
12Fh = Byte 3 = younger
Control Register
Control & Status Register
Points to 64K data segment
Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
13Ch = Byte 0 = older,
13Dh = Byte 1 = younger
13Eh = Byte 2 = older,
13Fh = Byte 3 = younger
Control Register
Control & Status Register
Points to 64K data segment
Wrap Reload Value for A15 –A8, A7–A0 reloaded
to zero by hardware
Upper Bound (plus 1) on A15–A0
Current Address pointer A15–A0
Corresponds to A15–A0 Byte Count, generates
interrupt if enabled and byte count exceeded.
14C = Byte0 = older
14D = Byte 1 = younger
14E = Byte2 = older
14F = Byte3 = younger
Control Register
Control & Status Register
Points to 64K data segment
Description
Preliminary specification
XA-SCC
Reset
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
Value
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h
00h