MC56F8346 Freescale Semiconductor, Inc, MC56F8346 Datasheet - Page 121
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MC56F8346
Manufacturer Part Number
MC56F8346
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8346.pdf
(176 pages)
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6.5.8.3
This bit selects the alternate function for GPIOC2.
6.5.8.4
This bit selects the alternate function for GPIOC1.
6.5.8.5
This bit selects the alternate function for GPIOC0.
6.5.9
The Peripheral Clock Enable register is used to enable or disable clocks to the peripherals as a power
savings feature. The clocks can be individually controlled for each peripheral on the chip.
6.5.9.1
Each bit controls clocks to the indicated peripheral.
6.5.9.2
Each bit controls clocks to the indicated peripheral.
6.5.9.3
Each bit controls clocks to the indicated peripheral.
Freescale Semiconductor
Preliminary
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Base + $C
RESET
Read
Write
0 = INDEX1/TB2 (default)
1 = MISO1
0 = PHASEB1/TB1 (default)
1 = MOSI1
0 = PHASEA1/TB0 (default)
1 = SCLK1
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
0 = The clock is not provided to the peripheral (the peripheral is disabled)
1 = Clocks are enabled
Peripheral Clock Enable Register (SIM_PCE)
GPIOC2 (C2)—Bit 2
GPIOC1 (C1)—Bit 1
GPIOC0 (C0)—Bit 0
External Memory Interface Enable (EMI)—Bit 15
Analog-to-Digital Converter B Enable (ADCB)—Bit 14
Analog-to-Digital Converter A Enable (ADCA)—Bit 13
EMI
15
1
Figure 6-12 Peripheral Clock Enable Register (SIM_PCE)
ADCB ADCA CAN DEC1 DEC0 TMRD TMRC TMRB TMRA SCI 1 SCI 0
14
1
13
1
12
1
11
1
56F8346 Technical Data, Rev. 15
10
1
9
1
8
1
7
1
6
1
5
1
4
1
SPI 1
3
1
SPI 0
2
1
Register Descriptions
PWMB
1
1
PWMA
0
1
121