MC56F8346 Freescale Semiconductor, Inc, MC56F8346 Datasheet - Page 24

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MC56F8346

Manufacturer Part Number
MC56F8346
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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24
Signal Name
(GPIOF10)
(GPIOF11)
(GPIOF12)
(GPIOF13)
(GPIOF14)
(GPIOF15)
(GPIOF9)
GPIOB0
(A16)
D0
D1
D2
D3
D4
D5
D6
Table 2-2 Signal and Package Information for the 144 Pin LQFP
Pin No.
33
59
60
72
75
76
77
78
Schmitt
Outputt
Output
Output
Outpu
Input/
Input/
Input/
Type
disabled,
pull-up is
output is
enabled
In reset,
enabled
During
pull-up
56F8346 Technical Data, Rev. 15
Reset
Input,
State
Port B GPIO — This GPIO pin can be programmed as an input or
output pin.
Address Bus — A16 specifies one of the address lines for
external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), A16 and EMI control signals are tri-stated when the
external bus is inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
After reset, the start-up state of GPIOB0 (GPIO or address) is
determined as a function of EXTBOOT, EMI_MODE and the Flash
security setting. See
pin is configured as an address pin at reset. In all cases, this state
may be changed by writing to GPIOB_PER.
To deactivate the internal pull-up resistor, clear bit 0 in the
GPIOB_PUR register.
Data Bus — D0 - D6 specify part of the data for external program or
data memory accesses.
Depending upon the state of the DRV bit in the EMI bus control
register (BCR), D0-D6 are tri-stated when the external bus is
inactive.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port F GPIO — These seven GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to the EMI Data Bus function.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF9, clear bit 9 in the GPIOF_PUR register.
Table 4-4
Signal Description
for further information on when this
Freescale Semiconductor
Preliminary

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