MC56F8346 Freescale Semiconductor, Inc, MC56F8346 Datasheet - Page 139
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MC56F8346
Manufacturer Part Number
MC56F8346
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8346.pdf
(176 pages)
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1. Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application. Determined on 2s2p ther-
2. Junction to ambient thermal resistance, Theta-JA (R
3. Junction to case thermal resistance, Theta-JC (R
4. Thermal Characterization Parameter, Psi-JT (Ψ
5. Junction temperature is a function of on-chip power dissipation, package thermal resistance, mounting site (board) temperature,
6. See
7. TJ = Junction temperature
Note: The 56F8146 device is guaranteed to 40MHz and specified to meet Industrial requirements only;
Freescale Semiconductor
Preliminary
Junction to ambient (@1m/sec)
Junction to ambient
Natural convection
Junction to ambient (@1m/sec)
Junction to case
Junction to center of case
I/O pin power dissipation
Power dissipation
Maximum allowed P
Supply voltage
ADC Supply Voltage
Oscillator / PLL Supply Voltage
mal test board.
in a horizontal configuration in natural convection. Theta-JA was also simulated on a thermal test board with two internal planes
(2s2p, where “s” is the number of signal layers and “p” is the number of planes) per JESD51-6 and JESD51-7. The correct name
for Theta-JA for forced convection or with the non-single layer boards is Theta-JMA.
plate technique with the cold plate temperature used as the "case" temperature. The basic cold plate measurement technique is
described by MIL-STD 883D, Method 1012.1. This is the correct thermal metric to use to calculate thermal performance when
the package is being used with a heat sink.
ter of case as defined in JESD51-2. Ψ
vironments.
ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
TA = Ambient temperature
Part 12.1
CAN is NOT available on the 56F8146 device.
Characteristic
Characteristic
for more details on thermal design considerations.
D
(V
REFLO
Table 10-4 Recommended Operating Conditions
= 0V, V
Four layer board (2s2p)
Four layer board (2s2p)
Table 10-3 Thermal Characteristics
JT
V
is a useful value to use to estimate junction temperature in steady-state customer en-
DDA_OSC_PLL
V
SS
Symbol
DDA_ADC,
Comments
V
V
DD_IO
REFH
= V
56F8346 Technical Data, Rev. 15
JT
), is the "resistance" from junction to reference point thermocouple on top cen-
SSA_ADC
θJC
θJA
), was simulated to be equivalent to the measured values using the cold
) was simulated to be equivalent to the JEDEC specification JESD51-2
V
= 0V
REFH
or equal to V
,
V
must be less than
DDA
Notes
Symbol
P
(2s2p)
R
R
R
R
P
Ψ
DMAX
= V
P
θJMA
θJMA
θJMA
DDA_ADC
θJC
I/O
JT
D
DDA_ADC
P
= V
D
(TJ - TA) / R
User-determined
= (I
144-pin LQFP
Min
DDA_OSC_PLL
3
3
3
6
DD
Value
43.8
40.8
39.2
11.8
x V
1
DD
Typ
θ
3.3
3.3
3.3
+ P
JA
)
7
I/O
)
General Characteristics
Max
3.6
3.6
3.6
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
W
W
W
Notes
Unit
4, 5
1,2
1,2
2
3
V
V
V
139