MC56F8366 Freescale Semiconductor, Inc, MC56F8366 Datasheet - Page 116

• Manufacturer Part Number: MC56F8366
• Description: 56f8300 16-bit Digital Signal Controllers
• Manufacturer: Freescale Semiconductor, Inc

6.4 Operating Mode Register
The reset state for MB and MA will depend on the Flash secured state. See
information on how the Operating Mode Register (OMR) MA and MB bits operate in this device. For
additional information, see the DSP56800E Reference Manual.
Note:
116
•
RESET
Type
Bit
Stop Mode
When in Stop mode, the 56800E core, memory, and most peripheral clocks are shut down. Optionally, the
COP and CAN can be stopped. For lowest power consumption in Stop mode, the PLL can be shut down.
This must be done explicitly before entering Stop mode, since there is no automatic mechanism for this. The
CAN (along with any non-gated interrupt) is capable of waking the chip up from Stop mode, but is not fully
functional in Stop mode.
The OMR is not a Memory Map register; it is directly accessible in code through the acronym OMR.
R/W
15
NL
0
14
0
13
0
12
0
11
0
56F8366 Technical Data, Rev. 6
10
Figure 6-1 OMR
0
9
0
R/W
CM
8
0
R/W
XP
7
0
R/W
SD
6
0
R/W
5
R
0
Part 4.2
R/W
SA
4
0
R/W
EX
3
0
and
Freescale Semiconductor
Part 7
2
0
0
R/W
MB
1
X
for detailed
Preliminary
R/W
MA
X
0