OM6208 NXP Semiconductors, OM6208 Datasheet - Page 29

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OM6208

Manufacturer Part Number
OM6208
Description
Om6208 65 X 96 Pixels Matrix Grey-scale Lcd Driver
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
11.4
After reset, the LCD driver is in Power-down mode, the
RAM is undefined and the internal registers have the
status shown in Table 8.
11.5
In the Power-down mode:
Power-down mode is active when the display is off
(DON = 0) and all the pixels are on (DAL = 1).
11.6
The bits DON, E and DAL select the display mode (see
Table 9).
11.6.1
When the MX input is at logic 0, the display RAM is written
from left to right (X = 0 is on the left side).
When the MX input is set to 1, the display RAM is written
from right to left (X = 0 is on the right side).
The MX input value has an impact on the way the RAM is
written: if a horizontal mirroring of the display is desired,
the RAM must be rewritten after changing the MX pad
value.
11.6.2
When the MY bit is set to logic 1, the display is mirrored
vertically.
A change of this bit has an immediate effect on the display,
it is not necessary to rewrite RAM for the effect to take
place.
2003 feb 10
All LCD outputs (row and column outputs) are at V
(display off)
Bias generator and V
external V
Oscillator is off (an external clock is possible)
RAM contents are unchanged; RAM data can be written
V
65 x 96 pixels matrix grey-scale LCD driver
LCD
Reset function
Power-down mode
Display Control
is discharged to V
H
V
ERTICAL MIRRORING
ORIZONTAL MIRRORING
LCD
supply can be applied or disconnected
LCD
SS
generator are switched off;
.
SS
29
11.7
Y[4:0] defines the Y address of the display RAM.
Table 12 Y address range
11.8
The X address points to the columns. The range of X is
0 to 95.
11.9
The OM6208 is a grey-scale driver able to provide different
bias voltage levels for rows and columns. The row voltage
values are V
chain shown in Fig.28.
The five levels used to drive the columns are shown in
Fig.28. These are V
depend on the value of alpha. Table 13 shows all possible
combinations of alpha settable by programming the
BS[2:0] bits.
Y4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Set Y address of RAM
Set X address of RAM
Bias levels
Y3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
LCD
, V
Y2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
SS
2L
and V
, V
Y1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1L
, V
C
, generated using the resistor
C
, V
Y0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1H
and V
Product specification
DISPLAY RAM
2H
OM6208
bank 10
bank 11
bank 12
bank 13
bank 14
bank 15
bank 16
bank 0
bank 1
bank 2
bank 3
bank 4
bank 5
bank 6
bank 7
bank 8
bank 9
, all of which

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